RISC-V Training

At least 60% of functional verification work in VLSI is based on SOC & Subsystem verification. It is essential for every verification engineer to gain expertise on SoC & Subsystem verification concepts. The course is for functional verification engineers with module level verification expertise and planning to explore SOC verification. This course is essential for every verification engineer with 5+ years of experience have never got exposure to SOC verification.

1.RISC-V Introduction
2.RISC-V ISA Overview
3.Exceptions, Traps and Interrupts
4.RV32I Base Integer Instruction set
5.RV32E Base Integer Instruction Set
6.RV64I Base Integer Instruction set
7.RV32/64G Instruction set listings
8.RISC-V Assembly programming summary
9.M Standard Extension for Integer Multiplication and Division
10.A Standard Extension for Atomic Instructions
11.F Standard Extension for Single-Precision Floating-point
12.D Standard Extension for Double-Precision Floating-point
13.Multiple hands on example on RISC-V based code implmentation

Currently there is no live sessions planned. You may enrol for e-learning course for self paced learning, with option to join upcoming batch with no additional cost.

Course SoC Design & Verification
Duration 7 weeks
Next Batch Adhoc (when course has a minimum strength)
Demo Session
Course repeats every 10 weeks
Fee INR 11000 +GST at 18%
Tool Questasim, Kiel
Mode of training Classroom training at VLSIGuru Institute, Banaswadi, ORR
Online training using live training sessions
Certificate Issued based on 50% assignment completion as criteria
Batch Size 20
Assignments 20
Trainer 12+ Years exp in RTL design & Functional verification

What are the Course Prerequisites?

  • Exposure to module level verification
  • Exposure to standard protocols like AXI, AHB, etc

What if I miss few sessions during course?

Each session of course is recorded, missed session videos will be shared

Course has started few weeks back, can I still join the course in between?

  • Yes, You will have option to view the recorded videos of course for the sessions missed
  • You will have option to repeat the course any time in next 1 year

Do you offer support after course completion?

  • Yes, Course fee also includes support for doubt clarification sessions even after course completion
  • You have option to mail you queries
  • Option to meet in person to clarify doubts
  • SoC architecture docs, protocol specification docs, etc.
  • Target Audience:
    • Verification engineers who have only exposure to Module level verificaiton, would like to widen verification exposure.
    • MTech & BTech freshers who are well versed with SV, and would like to learn advanced verification
    • Engineers with prior experience in other domains of VLSI or experience non-VLSI domains, want to make career in Functional Verification
    • Engineering college faculty looking to enhance their VLSI skill set
  • Multiple trainers, with experience of working on multiple SOC tape outs. All working in top-3 product companies.
error: Content is protected !!
Call Now Button
× Live Chat