• 1. How VLSI Training @ VLSIGuru is different from other Training institutes?

    • Industry focused training at affordable fee
    • Trainers with 10+ years of exp, currently working in industry.
    • Projects based on industry standard protocols like AXI, AHB, USB, PCIe, DDR, etc
    • All projects executed from scratch
    • Dedicated lab sessions to ensure student develops complete project from scratch
    • Only Institute to offer training in all aspects of VLSI Design flow
    • 100% job assurance based on performance in course assignments and monthly evaluation test
  • 2. How this course will benefit a working professional or a B.Tech & MTech freshers?

    Below is summary of projects executed as part of SV & UVM training courses. All these projects are executed from scratch. Students are given guidance each stage of project. Student has option to repeat the whole course.

    Projects as part of SV course(VG-SV)
    • Ethernet Loopback Design Functional Verification(System Verilog learning exercise)
    • AXI Verification IP(VIP) Development using SystemVerilog
    • Memory Controller(SRAM, SDRAM, Flash, ROM) Functional Verification using SV
    Projects as part of Methodology(UVM & OVM) Course(VG-VM)
    • AHB Universal Verification Component(UVC) development using UVM
    • AHB Interconnect Model Verification using SV & UVM
    • USB2.0 Core Functional Verification using SV & UVM
    • UVM based Register Model development for USB2.0 core

    Most of the current job requirements are based on AXI, AHB, USB, PCIEx and DDR kind of protocols. We do projects based on these protocols to ensure working professional/fresher improve their profile in finding better job opportunities.

  • 3. All courses are offered at 70% less than any other established training institute. Do you compromise on training quality?

    VLSIGuru runs on philosophy “best quality education, affordable fee”.

    Any training course is driven by 3 aspects.
    1. Trainer and Quality of training content
    2. Practical aspects of learning, placement support
    3. Cost of training

    Each course is well organized and tracked using professional course management system. We have best trainers for each course. We do not give much emphasis on institute interiors and miscellaneous facilities like AC, etc.

    Still does not convince how we keep training fee less, let’s do some maths.

    Ex: Physical Design
    - Number of students trained per year in Physical Design = 60
    - Fee collected = 15+ Lakhs(with 24K fee)
    - Cost of tool = 6 Lakhs per complete year.
    - Still we have enough margin to pay very well to trainers. Hence we can offer training at 24K.

    Similar calculations works for all other courses. Front end tools are even cheaper, hence those courses are offered even lesser fee compared to Physical Design training.

    Many institutes see training as a business; for VLSIGuru, training is an opportunity to empower graduates for better career opportunities, while keeping it affordable.
  • 4. Is it feasible to complete all above mentioned projects in 4.5 months time?

    Yes. We will be doing all above mentioned projects in the 4.5 months time, while covering SV & UVM as well. We have done it for 35 batches so far, doing the same for a new batch is no exception. We extend course by few more sessions if required.

    Module(IP) verification project in VLSI typically goes for 6 months to 1 year based on design complexity. The majority of work(spec reading, feature listing down, Testbench architecture, testcase listing down, testbench coding, etc) happens in initial few months of project. Rest of time will be focused on developing testcases, setting up regression and verification closure using regression debugging and coverage analysis. As part of project training we will be giving lot of emphasis on 1st aspect(i.e from Spec to testbench component coding). We will be developing majority of testcases(but not all). Rest depends on student motivation to complete on remaining aspects of project. We will be available to help students with their queries even after course completion.

  • 5. Many VLSI Training institutes are offering a course on complete VLSI flow(Front end and Back end), then why do a course with focus on just one aspect of VLSI Flow?

    All the jobs in VLSI industry at 0 - 7 year experience level does not require expertise in complete VLSI flow. The engineer is not expected to work on complete flow during initial 0-7 years of experience. Focus on complete flow does more harm than helping engineer's career, with reduced focus on a specific aspect.

    Job require specialization in one of the aspect below, and jobs can be categorized as below :
    • Marketing team
    • Architect
    • Design Engineer
    • Integration & Synthesis Engineer
    • Verification Engineer (Functional & Timing Verification)
    • PD Engineer
    • STA Engineer
    • Layout Engineer
    • DFT Engineer
    A job aspirant should focus on one of above aspects to get in to the industry, while gaining more expertise on the chosen aspect by extensive focus, rather than doing course on complete flow . VLSI Guru has expertise in complete VLSI flow starting from RTL Design to Post Silicon validation.
  • 6. Is there any placement assistance?

    Institute has tie up with select VLSI companies. Student will get opportunity to attend these companies interviews.
    Number of opportunities student gets also depends on his/her performance during course. It solely measured using completion of all assignments.
  • 7.VLSI Training course is not focused on FPGA, does it not affect chances of getting VLSI Job?

    No. As a Design & Functional Verification engineer, there is essentially no difference between ASIC & FPGA. Both ASIC & FPGA have same flow during design & verification. The difference comes in way backend flow is done, which does not affect a verification engineer.

    The reason colleges/universities focus on teaching design in FPGA flow is because of the low cost of project execution on FPGA. Executing a project on FPGA involves only Spartan or any other FPGA board. Whereas same design flow costs in millions of rupees to be executed in ASIC flow. Hence colleges focus on FPGA flow teaching.

  • 8. What if I miss few sessions of course?

    • Each Session of course is recorded. Student will be provided with option to view the recorded videos.
    • Student also has option to repeat complete course at no additional fee. Only for classroom students.
  • 9. Does the center provide any certification after completion of VLSI training?

    Yes. All the participants will receive VLSI Training completion certificate from VLSIGuru, with their grades based on their performance during the VLSI training.
  • 10. Course is offered for less than 20K, while other institutes are charging at 60K/1L/1.4L. Is there any compromise on quality of training?

    We are not offering a B.Tech or M.Tech degree that we should charge a student hefty amount. Trainers@VLSIGuru are all working, for us training is more of a passion than money. Institute runs on philosophy that, "education should be affordable to everyone, while not compromising on quality".

    Please note, if student is not satisfied with the course, fee is refundable on a prorata basis. No questions asked. We will only try to improve on mistakes.
  • 11. How much time it will take to complete preparation? When I will be ready for job?

    It depends on current preparation level. Below is the time it takes to gain perfection in various courses. Verilog : 105 Hours Systemverilog: 240 Hours UVM: 150 Hours Physical Design: 360 Hours PERL or TCL Scripting: 30 Hours UNIX : 15 Hours VLSI Design flow: 10 Hours Digital Design(Basic & Advanced): 50 Hours Fresher looking for job in VLSI Front end or Back end will require 600 hours in total. Duration of preparation will depend on number of hours(focused preparation time) spent per day. For each hour of training, student need to spend 2 hours of time for self-preparation 1 Hour for revising session notes, labs, preparing own notes. 1 Hour for practicing course assignments and labs.
  • 12. I have completed my BTech/MTech in 2013 or few years back, I am not in any job, and can I still try for VLSI job?

    Yes. It is possible to get job in VLSI even with few years gap after graduation. You need a right guidance.
  • 13. I am working in non-VLSI domain for last 2 years, can I look for job in VLSI?

    Yes. 2 Years is short span, so with right set of projects and right skill set, you will find opportunities in VLSI
  • 14. I am a working professional, I want to finish of SV & UVM training in 2 weeks, and do you have any program for this?

    • Yes, we do have. • Ideally, we do not suggest anyone to undergo 2 weeks training, because training requires repeated interactions between trainer and student. • 2 weeks of time will not give time to complete the assignments, it is most important aspects of the course
  • 15. Can I complete VLSI training in 1.5 months?

    • Yes, you can complete. However your preparation may not be up to mark.
  • 16. I am a BTech graduate seeking career in VLSI, how should I prepare?

    • Do not register for complete VLSI training course. • You should start of by opting for basics course(for front end it is Verilog and Advanced Digital design, for Backend it is Physical design basics training). If you find these courses interesting, then you should opt for complete VLSI training course. Many institutes might not offer training only in Verilog, but you should insist, because once you pay the fee for complete course, they will not refund. • If you do course in VLSI basics by spending less fee, you will still have option to pursue with VLSI or look for career in other domain.
  • 17. What kind of salaries are offered in VLSI?

    • For a fresher salary can be anywhere from 2 Lakhs to 6 Lakhs. Product companies do offer up to 15 Lakhs, but they mostly hire from campus.
  • 18. I am not from Bangalore, how do I attend this course?

    • All the courses are offered in both classroom and online. Online sessions are done using live gotomeeting training. Student attending online will get the same support as students from classroom.
  • 19. Can I prepare at institute during weekdays?

    • Yes. Institute is open from 7AM to 9PM on all 365 days. We strong recommend every student to prepare at institute. • Being at institute offers lot of benefits • Unlimited access to recorded videos from the course • Mentor guidance • Clarify doubts right away • Compare your preparation level with other students • Group discussions among other students
  • 20. I am coming to Bangalore for training, should I stay close by institute?

    Yes. It is strongly recommended to stay close by institute. There are many Paying guests (PGs) available nearby institute (within 1KM).
  • 21. Does institute offers any discount on fee?

    All courses are already offered at a lowest possible fee. Discount is offered to students from BPL economic status.
  • 22. What kind of support will I get during course?

    Course material, labs, assignments Doubts clarifications Unlimited access to course videos while at institute* Option to repeat the course Dedicated mentor
  • 23. I am from US, will the timings be comfortable for me?

    Yes. At least 20% of students in every batch are from US. We keep majority of our course timings in sync with students from US. In general we try to schedule all courses in morning timings between 6AM to 12PM, India time.
  • 24. I am going for master in US, can you suggest a course for me?

    We offer courses custom designed for students planning to pursue MS. Course comes with lot of flexibility in mode of training. Student can attend part of the course in class room, rest online from USA as required.
  • 25. Which tools do you use for training?

    Tools from Synopsys and Mentor Graphics We are the only training institute to have licenses from both Synopsys and Mentor graphics.
  • 26. Should I go for VLSI front end course or VLSI back end course?

    VLSI Flow can be majorly be divided in to 11 steps below. Assuming team has 50 engineers.
    Below shows possible distribution of team members in various domains(value in brackets is number of engineers)
    - RTL Design (1, SOC development mostly works on IP reuse, most of IP development happens out side India)
    - RTL Integration (2)
    - Functional verification (13)
    - Formal verification (1)
    - Synthesis (2)
    - Physical Design (13)
    - STA (3)
    - DFT (2)
    - Custom Layout (6)
    - Physical Verification (4)
    - Post Silicon validation (3)

    As shown above, every domain offers job opportunities. Even though Functional verification and Physical design offers more opportunities, they also have more people undergoing training. Hence student should choose domain of training based on interest rather than job openings.

    RTL Design, RTL integration, Functional verification, formal verification is more focused on learning protocols and implementing those protocol behavior using Verilog, SV & UVM. Job role will be more programming oriented.

    Rest of the flow(from Synthesis toll Post silicon validation) does not involve much of programming. These jobs are more tool oriented. Engineer need to gain expertise on how to use various EDA tools and implement the required flow using these.
    When a student joins institute, we do not make any assumption on their current preparation level, all the training starts from basics.
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