Given the competetion in VLSI job market, it becomes essential for ME & BE students to get themselves prepared for VLSI job while they are in college. It saves them 6 months of time they have to spend on training after passing out from college. It also helps them choose right project of ME.

MTech projects are targeted on industry standard design & verification to help student improve profile, ultimately helping in job search. MTech internship will be targeted towards enabling student learn complete verification concepts including SV & UVM based verification.

  • Projects on IEEE standard and based design & verification using SV & UVM
  • Projects based on industry standard Protocols like AXI, AHB, USB, PCIe etc
  • 1 year experience letter on completion of internship

Projects as per student requirements.

  • Internship Duration: 1 year
  • Fee : INR 18,000
  • Tools : Questasim(Mentor Graphics)
  • Access to tool using remote connection
  • Certificate of course completion

What are the Course Prerequisites?

  • Expertise on verilog Language
  • Exposure to Testbench component coding using verilog

Course has started few weeks back, can I still join the course in between?

  • Yes, You will have option to view the recorded videos of course for the sessions missed
  • You will have option to repeat the course any time in next 1 year

Do you offer support after course completion?

  • Yes, Course fee also includes support for doubt clarification sessions even after course completion
  • You have option to mail you queries
  • Option to meet in person to clarify doubts
  • Course Material Shared based on course structure:

Target Audience:

  • MTech & BTech freshers looling to make career in VLSI domain.
  • Engineering college faculty looking to enhance their VLSI skill set

Trainer Profile

  • 10+ years of rich experience of working in Functional Verification domain across various mobile, networking, high speed peripheral domains.
  • Experience of working on functional verification of Multiple Complex SOCs, multiple Sub systems
  • Experience of working on multiple complex module level projects
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