COURSE SCHEDULE(VLSI, EMBEDDED SYSTEMS)

For all courses:

• GST is chargeable at 18% on top of the fee mentioned.
• All courses offered in
  • Classroom training
  • live online training
  • Recorded videos for self paced learning
  • 1-to-1 training(charged per hour basis)
• Ad Hoc below refers to, courses where we do not get frequent requests, and are offered only when more than 5 students have registered for the course.
• There is option to join ongoing batch within 2 weeks from course start date, we help cover up the missed sessions. Beyond that student should join new batch.
• Students joining Design verification, Physical Design, DFT and Custom layout courses, will have option to switch to any other course within 2 weeks of joining the course. There will not be any additional fee for switching to different course within 2 weeks.
• Tool access for complete course duration for all relevant courses

Upcoming courses

Courses	Start Date	Link
Embedded systems	5/June	Course Structure
Verilog Training	07/MAY	Course Structure
Physical Design Training	08/MAY	Course Structure
Functional Verification course for experienced engineers	07/MAY	Course Structure
Functional Verification Course for freshers	07/MAY	Course Structure
FPGA design and verification training	07/MAY	Course Structure
RTL design and integration training	07/MAY	Course Structure
System Verilog functional verification Course	07/MAY	Course Structure
Custom Layout Training	08/MAY	Course Structure

Courses in VLSI Front End domain

Course	Course Details	Start Date	Course Duration	Fees	New Batch starts every
Functional Verification Training for Freshers	VLSI Course Structure	07/MAY	28 weeks	45000	9 weeks
Functional Verification Training for Experienced Engineers	VLSI Course Structure	07/MAY	22 weeks	36000	9 weeks
System Verilog Training	SV Course Structure	07/MAY	14 weeks	22500	9 weeks
VLSI Internship	VLSI Internship Structure	07/MAY	10 months	45000	9 weeks
UVM Training	UVM Course Structure	07/MAY	8 weeks	14000	12 weeks
RTL Design and verification training	Course Structure	07/MAY	24 Weeks	45000	8 weeks
FPGA Design and verification training	Course Structure	07/MAY	24 Weeks	45000	8 weeks
Verilog Training	Verilog Course Structure	07/MAY	8 Weeks	11000	9 weeks
VHDL Training	VHDL Course Structure	Adhoc	5 Weeks	6000	ad hoc

Courses in VLSI Backend

Course	Course Details	Start Date	Course Duration	Fee	New Batch starts every
Physical Design Training	Course Structure	08/MAY	24 Weeks	45000	8 weeks
RedHawk (Power Integrity & IR Drop Analysis) Training	Course Structure	Adhoc	5 Weeks	12000	12 weeks
Synthesis and STA Training	Course Structure	08/MAY	12 Weeks	30000	8 weeks
DFT Training	course structure	07/MAY	24 Weeks	45000	8 weeks
Custom Layout & Physical Verification Training	Course structure	08/MAY	24 Weeks	45000	8 weeks

Courses in Embedded Systems

Course	Course Details	Start Date	Course Duration	Fees	New Batch starts every
Embedded Systems Training	Embedded Systems Course Structure	5/June	18 Weeks	29000	9 weeks

SoC & Courses on Standard Protocols

Course	Course Details	Start Date	Course Duration	Fees	New Batch starts every
ARM Training	ARM Architecture Training Course Structure	Adhoc	6 Weeks	18000	Adhoc
DDR Protocol Training	DDR Training Course Structure	Adhoc	6 Weeks	6000	Adhoc
PCIe Protocol Training	PCIe Training Course Structure	16/JAN	6 Weeks	9000	16 weeks
USB3.0 Protocol Training	USB30 Course Structure	Adhoc	6 Weeks	9000	16 weeks
GLS Training	GLS Course Structure	Adhoc	3 Weeks	4500	16 weeks
Low Power verification Training	Power aware verification course structure	Adhoc	3 Weeks	4000	Adhoc
USB2.0 protocol and USB2.0 core verification Training	USB2.0 Course Structure	06/feb	7 Weeks	9000	Adhoc
AMBA(AXI, AHB, APB) protocol and VIP & UVC development Training	AMBA protocol training Course Structure	07/MAY	6 Weeks	11000	12 weeks
SoC Design & Verification Training	SoC Training	Adhoc	6 Weeks	11000	Adhoc

Courses on Scripting Languages

Course	Course Details	Start Date	Course Duration	Fee	New Batch starts every
PERL Training	PERL Course Structure	adhoc	5 Weeks	4500	10 weeks
Python Training	Python Course Structure	adhoc	5 Weeks	4500	10 weeks
TCL Training	TCL Course Structure	Adhoc	6 Weeks	7500	10 weeks
Shell Training	SHELL Course Structure	Adhoc	4 Weeks	3000	10 weeks

Call us for more details on VLSI Training course structure