Tcl is the defacto standard embedded command language for electronic design automation (EDA) and computer-aided design (CAD) applications. All the EDA tool flows from Synopsys, Cadence and Mentor Graphics use Tcl as the primary scripting interface for their flows. TCL as a single command language in all EDA tool flows ensures that a designer only needs to learn Tcl in order to work with all the flows.
Tcl scripting is much sought after skillset for every VLSI engineer.
- Introduce TCL
- Why TCL?
- TCL Script Processing
- Understand TCL uses and strengths
- Writing simple TCL scripts
- TCL for VLSI scripting
- TCL : Main Features
- TCL in EDA
- TCL shell (tclsh)
- Working with TCL scripts (UNIX)
- TCL Interpreter in SoC Design Tools
- TCL Scripting for SoC Design
- TCL Commands
- Substitution and Command Evaluation
- Mathematical Functions
- Control flow : if, if-else, switch, for, foreach, while, break and continue
- string, string operations
- List, List manipulation
- Arrays, array methods
- Working with files
- Command line arguments
- Regular expressions
- Complete TCL Scripts
- TCL Packages
- Next Batch: 02/July, 5:00PM – 7:00PM
- Duration: 4 weeks, 5:00PM to 7:00PM on both Saturday & Sunday
- Fee : INR 2,500 + Tax
- Tools : Cygwin
- Certificate of course completion
- Options to repeat the course without additional fee
- Registration on 08/Jul
Course has started few weeks back, can I still join the course in between?
- Yes, You will have option to view the recorded videos of course for the sessions missed
- You will have option to repeat the course any time in next 1 year
Do you offer support after course completion?
- Yes, Course fee also includes support for doubt clarification sessions even after course completion
- You have option to mail queries
- Option to meet in person to clarify doubts
Course Material Shared:
- TCL quick reference manual
- TCL Language Manual
- Session lab examples
- Every engineer who wants to utilize scripting to get smarter with work. Ex: A work manually done for 3-4 hours, could be done in 10-15 mins using intelligent scripting.
- Every engineer who has repetitive work on daily basis, and would like to automate the same. Time can be better utilized on learning more interesting things.
- Engineering college faculty looking to enhance their VLSI skill set
- BTech Electrical Engineering, IIT Bombay
- 12+ years of rich experience of implementing EDA flow using PERL, TCL, SHELL and PYTHON.