[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_column_text]Aptitude Questions:
1. A two-digit number exceeds the sum of the digits of that number by 18. If the digit at the unit’s place is double the digit in the ten’s place, what is the number?
A.22 B.20 C.24 D.26

2. What is the sum of two consecutive even numbers, the difference of whose squares is 84?
A.42 B.45 C.47 D.49

3. The smallest value of n, for which 2n + 1 is not a prime number is
A.0 B. 1 C.2 D.3

4. The sum of three consecutive multiples of 3 is 72. What is the largest number?
A.27 B.28 C.29 D.30

5. A watch ticks 90 times in 95 seconds and another watch ticks 315 times in 323 seconds. If both the watches are started together, how many times will they tick together in first hour? 101
A.99 B.102 C.100 D.101

6. If each of the three nonzero numbers a, b, and c is divisible by 3, then abc must be divisible by which one of the following the numbers?
A.25 B.27 C.29 D.23

7. What is the remainder when 1044 * 1047 * 1050 * 1053 is divided by 33?
A.30 B.32 C.34 D.36

8. How many times a typist uses keys in a type writer for printing numbers in a book of 300 pages.
A.792 B.729 C.927 D.297

9. In a question on division with zero remainder, a candidate took 12 as divisor instead of 21. The quotient obtained by him was 35. The correct quotient is?
A.20 B.22 C.24 D.26

10. The speed of a boat in still water is 10 km/hr. If it can travel 26 km downstream and 14 km upstream in the same time, the speed of the stream is:
A. 5km/hr B. 2km/hr C. 3km/hr D. 8km/hr

11. A boatman goes 2 km against the current of the stream in 1 hour and goes 1 km along the current in 10 minutes. How long will it take to go 5 km in stationary water?
A. 1hr 25min B. 1hr 15min C. 1hr 05min D. 1hr 13min

12. A boat running upstream takes 8 hours 48 minutes to cover a certain distance, while it take 4 hours to cover the same distance running downstream. What is the ratio between the speed of the boat and speed of the water current respectively?
A.3:8 B.5:3 C.3:5 D.8:3

13. A person has to cover a distance of 6 km in 45 minutes. If he covers one-half of the distance in two-thirds of the total time; to cover the remaining distance in the remaining time, his speed (in km/hr) must be :
A. 13km/hr B. 10km/hr C.12km/hr D. 11km/hr

14. A boy rides his bicycle 10 km at an average speed of 12 km/hr and again travels 12 km at an average speed of 10 km/hr. His average speed for the entire trip is approximately.
A.9.8km/hr B.10.8km/hr C.11.4km/hr D.9.4km/hr

15. Two men starting from the same place walk at the rate of 5 kmph and 5.5kmph respectively. What time will they take to be 8.5 km apart, if they walk in the same direction?
A.15 hrs B.17hrs C.16hrs D.14hrs

Digital Electronics Questions:
16.The truth table for the SOP expression has how many input combinations?

A. 1

B. 2

C. 4

D. 8

17.In a binary-weighted D/A converter the sum of all the currents from the binary weighted resistors flows through the operational amplifier.

A. True

B. False

18.
The Boolean SOP expression obtained from the truth table below is ________.

A.

B.

C.

D. None of these

19.Serial communication can be sped up by:

A. using silver or gold conductors instead of copper

B. using high-speed clock signals

C. adjusting the duty cycle of the binary information

D. using silver or gold conductors instead of copper and high-speed clock signals

20.The high input impedance of MOSFETs:

A. allows faster switching

B. reduces input current and power dissipation

C. prevents dense packing

D. creates low-noise reactions

21.A sequential circuit design is used to ________.

A. count up

B. count down

C. decode an end count

D. count in a random order

22.In order to check the CLR function of a counter, ________.

A. apply the active level to the CLR input and check all of the Q outputs to see if they are all in their reset state

B. ground the CLR input and check to be sure that all of the Q outputs are LOW

C. connect the CLR input to Vcc and check to see if all of the Q outputs are HIGH

D. connect the CLR to its correct active level while clocking the counter; check to make sure that all of the Q outputs are toggling

23.The Boolean equation of the exclusive-NOR function is .

A. True

B. False

24.Which of the following statements best describes the operation of a synchronous up-/down-counter?

A. The counter can count in either direction, but must continue in that direction once started.

B. The counter can be reversed, but must be reset before counting in the other direction.

C. In general, the counter can be reversed at any point in its counting sequence.

D. The count sequence cannot be reversed, once it has begun, without first resetting the counter to zero.

25.The frequency of the clock waveform is defined as the reciprocal of the clock period.

A. True

B. False

26.Eight states are in an 8-bit Johnson counter sequence.

A. True

B. False

27.Static RAMs (SRAMs) use internal capacitors as basic storage elements.

A. True

B. False

28.Parallel in/parallel out registers have parallel input and output busses.

A. True

B. False

29.A ripple counter is an asynchronous counter.

A. True

B. False

30.A standard logic device can be connected on a bus system as an open-collector logic device by connecting each output to a ________.

A. discrete transistor

B. 10 k series resistor

C. light-emitting diode

D. CMOS buffer

31.A DAC is ________ if its output increases as the binary input increments from one value to the next.

A. monotonic

B. self adjusting

C. accurate

D. broken

32.In a flash analog-to-digital converter, the output of each comparator is connected to an input of a ________.

A. decoder

B. priority encoder

C. multiplexer

D. demultiplexer

33.In a digital reproduction of an analog curve, accuracy can be increased by ________.

A. sampling the curve more often

B. sampling the curve less often

C. decreasing the number of bits used to represent each sampled value

D. all of the above

34.Look up the propagation delay from the clock to the output for the 7476. Are the HIGH-to-LOW and LOW-to-HIGH propagation delays the same?

A. yes

B. no, tPLH = 25 ns, tPHL = 40 ns

C. no, tPLH = 40 ns, tPHL = 25 ns

D. no, tPHL = 25 ns, tPLH = 40 ns

35.The odd/even parity system would require a sixth bit to be added to a 4-bit system.

A. True

B. False

APTITUDE AND GENERAL QUES
36.A can lay railway track between two given stations in 16 days and B can do the same job in 12 days. With help of C, they did the job in 4 days only. Then, C alone can do the job in:
A.9 1 days
5

B.9 2 days
5

C.9 3 Days
5

D.10

37. A train 125 m long passes a man, running at 5 km/hr in the same direction in which the train is going, in 10 seconds. The speed of the train is:
A.45 km/hr
B.50 km/hr
C.54 km/hr
D.55 km/hr

38.Two ships are sailing in the sea on the two sides of a lighthouse. The angle of elevation of the top of the lighthouse is observed from the ships are 30° and 45° respectively. If the lighthouse is 100 m high, the distance between the two ships is:
A.173 m
B.200 m
C.273 m
D.300 m

39.3 pumps, working 8 hours a day, can empty a tank in 2 days. How many hours a day must 4 pumps work to empty the tank in 1 day?
A.9
B.10
C.11
D.12

40.Tea worth Rs. 126 per kg and Rs. 135 per kg are mixed with a third variety in the ratio 1 : 1 : 2. If the mixture is worth Rs. 153 per kg, the price of the third variety per kg will be:
A.Rs. 169.50
B.Rs. 170
C.Rs. 175.50
D.Rs. 180

41. A is two years older than B who is twice as old as C. If the total of the ages of A, B and C be 27, the how old is B?
A. 7
B.8
C.9
D.10
E.11

42.Name the Indian cricketer who was honoured with the Padma Bhushan Award by President Ram Nath Kovind?
A.Rohit Sharma
B.Mahendra Singh Dhoni
C.Ashwin R
D.Dinesh Karthik

43. Who becomes the first Indian to win a gold medal at the Commonwealth Games 2018?
A.Mary Kom
B.Karnam Malleswari
C.Mirabai Chanu
D.Kunjarani Devi

44. Who is the
A)Vice president of india B) President of india C) Ministry of home affairs D) Finance minister
10.When is International workers day Celebrated ?

45. How many times the program will print ” VLSIguru ” ?
#include

int main()
{
printf(“VLSIguru”);
main();
return 0;
}
A.Infinite times
B.32767 times
C.65535 times
D.Till stack overflows

46.The law J = ?E, where J is current density, ? is electrical conductivity and E is field strength is
A.Ohm’s law
B.Gauss law
C.Ampere’s law
D.Biot-Savart law

47.A parallel plate capacitor has its length, width and separation doubled. It fringing effects are neglected, to keep the capacitance same, the dielectric constant must be
A.Halved
B.kept the same
C.Doubled
D.made 4 times

48. In an n-p-n transistor, the majority carriers in the base are
A.Electrons
B.Holes
C.both holes and electrons
D.either holes or electrons

49.A capacitor stores 0.15C at 5 V. Its capacitance is
A.0.75 F
B.0.75 ?f
C.0.03 F
D.0.03 ?f

50.2’s complement of binary number 0101 is
A.1011
B.1111
C.1101
D.1110

51.In 2’s complement representation the number 11100101 represents the decimal number
A.+37
B.-31
C.+27
D.-27

52.For the gate in the given figure the output will be
A.0
B.1
C.A
D.A

53.The basic storage element in a digital system is
A.flip flop
B.Counter
C.Muliplexer
D.Encoder

54. A 64-bit word consists of ________.
A. 4 bytes
B.8 bytes
C.10 bytes
D.12 bytes

PHYSICAL DESIGN OBJECTIVE QUESTIONS:
1) Why we have to remove scan chains before placement?
a. Because scan chains are group of flip flop
b. It does not have timing critical path
c. It is series of flip flop connected in FIFO
d. None
2) Delay between shortest path and longest path in the clock is called ____.
a. Useful skew
b. Local skew
c. Global skew
d. Slack
3) Cross talk can be avoided by ___.
a. Decreasing the spacing between the metal layers
b. Shielding the nets
c. Using lower metal layers
d. Using long nets
4 ) Prerouting means routing of _____.
a. Clock nets
b. Signal nets
c. IO nets
d. PG nets
5) Which of the following metal layer has Maximum resistance?
a. Metal1
b. Metal2
c. Metal3
d. Metal4
6) To achieve better timing ____ cells are placed in the critical path.
a. HVT
b. LVT
c. RVT
d. SVT
7) Filler cells are added ___.
a. Before Placement of std cells
b. After Placement of Std Cells
c. Before Floor planning
d. Before Detail Routing
8) Search and Repair is used for ___.
a. Reducing IR Drop
b. Reducing DRC
c. Reducing EM violations
d. None
9) The minimum height and width a cell can occupy in the design is called as ___.
a. Unit Tile cell
b. Multi heighten cell
c. LVT cell d. HVT cell

10) In OCV timing check, for setup time, ___.
a. Max delay is used for launch path and Min delay for capture path
b. Min delay is used for launch path and Max delay for capture path
c. Both Max delay is used for launch and Capture path
d. Both Min delay is used for both Capture and Launch paths

11) Which of the following is having highest priority at final stage (post routed) of the design ___?
a. Setup violation
b. Hold violation
c. Skew
d. None

12) Which of the following is best suited for CTS?
a. CLKBUF
b. BUF
c. INV
d. CLKINV

13) Routing congestion can be avoided by ___.
a. placing cells closer
b. Placing cells at corners
c. Distributing cells
d. None

14) Pitch of the wire is ___.
a. Min width
b. Min spacing
c. Min width – min spacing
d. Min width + min spacing

15) What is the effect of high drive strength buffer when added in long net ?
a. Delay on the net increases
b. Capacitance on the net increases
c. Delay on the net decreases
d. Resistance on the net increases.

16)What does initialize_floorplan do?
1. Defines placement rows within the core area
2. Defines the chip boundary or periphery area
3. Places IO pad cells in their defined locations
4. Places macro cells per their placement constraints

a)1,2,4
b)1,3,4
c)1,2,3
d)All of the above

17)A “soft” placement blockage will:
a. Allow only timing-critical cells to be placed
b. Allow only non timing-critical cells to be placed
c. Allow cell placement only during initial coarse placement
d. Prevent cell placement during initial coarse placement

18)Circle the correct statement(s) about what create_fp_placement does by default:
a. Optimizes logic (cell sizing, buffering) to improve timing
b. Legally places std cells and non-fixed macros to minimize
wire length
c. Optimizes placement to improve timing
d. Clumps cells from the same logical hierarchy together[/vc_column_text][/vc_column_inner][/vc_row_inner][/vc_column][/vc_row]

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