VLSI Functional verification

1-1 training Highlights

Verilog

TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2

 

Verilog

TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2

 

Verilog

TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2

 

TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2

 

FAQ

TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2
TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2
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TopicDuration(Hours)
Verilog constructs2
Combinational logic implementation5
Sequential logic implementation3
Advanced Verilog language constructs10
Verilog projects 
Memory verilog coding and TB development3
Synchronous and Asynchronous FIFO design and verification4
SPI Controller4
Pattern detector2

 

Teacher is an important part of anybody's education.

I completed my post graduation in 2005. During my school and College, I always had difficulty coping up with things in classroom. But my Telugu teacher Mr. Hussain Budde during my 7th class , I used to enjoy his way of teaching, way he used to engage students by teaching lessons as stories. After that, I never found any teacher who kept sessions so much engaging. I don't want to blame my teachers, I always felt they could make sessions more engaging. I always had to spend time outside class hours to cope up with every minute of classroom session.

I as a teacher, adopt a style of teaching which keeps session engaging and ensures that students give 100% focus on the session. I always wanted to be that one teacher, whom my students will remember for lifetime. I am making sure that, rest of trainer's also follow same.

I want your 6 months of education at VLSIGuru to be among your best learning experiences. We at VLSIGuru will do our best to make this a memorable time.

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