SESSION#1

revision:

1. VLSI design flow
   o various steps
2. Where does functional verification fits in to VLSI design flow?
3. What is the skill set required for VLSI front end (functional verification) engineer?
   o Text editor (P1) => Today
   o Digital design (P1)
   o Verilog (P1) o SV (P2)
   o Linux (P2) o Python (P3)
   o UVM (P3)
   o standard protocols (P1, P2, P3)
   o debug (P1, P2, P3)
4. How the course will be organized.

Questions

1. marketing team decides whether to go with FPGA or ASIC flow
   o 1Lakh or lesser => FPGA
   o 1million + => ASIC
   o 1 lakh to 1 million => FPGA/ASIC

Agenda:

1. Text editor (P1) => Today
   o nothing to do with VLSI as such
   o text editor expertize can reduce overall coding effort
   o text editor comes with keyboard shortcuts
   o copied 11 lines => went to the line from where we want to copy, 11yy(yank=copy)
   o I took my cursor to the point where I want to paste (p)
2. what may take 1 hour time to code, you can finish it in 10 minutes time.
3. Multiple text editor
   ====== Below 4 are not good for programming development =========
   //we don’t get shortcuts
   o notepad ==> 2 sec
   o wordpad
   o idle
   o microsoft word ==> 15 sec to load
   o word is good for graphics (colors, font size, 3d effect, images, tables) ====== Below 4 are good for programming development =========
   //they come with shortcuts
   o notepad++
   o gvim ===> Using this throughtout the course
   o nedit
   o emacs
4. gvim
   o G : Graphical
   o Vim
5. GVIM works in two modes
   o command mode (thickbox)
   o we can do KBD shortcuts only in this mode
   o insert mode (|)
   o we can type the program or text in this mode
   o when cursor is in insert mode(|), don’t enter KBD shortcuts
6. GVIM
   o press escape => command mode
   o to enter insert mode: type i or a or ins (various other options)
7. How does KBD shortcuts work?
   o short notation of what we want to do.
   o delete word => dw
   o paste => p
   o change word => cw
8. KBD shortcut classification
   o shortcuts for moving from one part of the file to other
   o jumping to specific line number
   o shortcuts for copying a code and pasting
   o shortcuts for deleting a piece of code
   o shortcuts for code replacing(substitution)
   o shortcuts for opening multiple files in same window
   o shortcuts for making code look better(indentation, numbering)
   o shortcuts for doing repetetive activities in simple manner
   o shortcut for undoing the things(what we did earlier)
9. insert(type) mode, command mode, how to move from one to other modes
10. how to move cursor to the left(h), right(l), top(k), down(j), multiple lines(10j)
    l : move cursor to the right one position
    4l : move 4 spaces instead of typing: kkkkk => 5k
    any keyboard shortcut, with a number before => repeat the shortcut those many times
    • moving by one space => h,l,k,j
    • moving by words => 3w(right side), b(left side)
    • moving to end of the line($), beginning of the line(0) =>
    • moving to end of the file($),
    • how to move to 1st line(gg), how to move to last line of the file(G)
    • Select whole file text content: ggVG
      end of the line(end), beginning of the line(0), next word(w), end of the word(e), previous word(b)
      Moving to specific line number (:20, enter)
11. shortcuts for copying a code and pasting
    copy a character, multiple characters
    copy a word(yw), multiple words(nyw)
    copy a line(yy), multiple lines(nyy)
    copy the entire file content (ggVG, copy)
12. deleting
    delete character(x), multiple characters(nx)
    delete word(dw), multiple words(ndw)
    delete line(dd), multiple lines(ndd)
    delete the entire file content (ggVG, delete)

SESSION#2

revision:

1. how to work with GVIM.
   o you become good by doing these things yourself

agenda:

1. Verilog language
   o combinational logic
   o testbench development
   o simulation, check the waveforms
2. DFT
   o very basic level of Verilog
   Functional verification
   o need to leanr verilog to the perfection

notes:

1. why do we need Verilog language?
   o when we have C, C++, Java, ….
   o C, C++, Java
   o not meant for implementing a hardware behavior
   o hardware has requirements which are different from software
   o hardware needs concept of time
   o hardware needs concept of structure
   o hardware needs concept of state and states changing with time
   o hardware needs concept of concurrent execution
2. Verilog
   • visualize how the hardware structure looks like
   • multiplexor (2×1)
     o list down signal names: i1(input), i0(input), sel(input), y(output)
     o we should know the functionality of multiplexor
     o if sel is 0, y will be i0
     o if sel is 1, y will be i1
3. gate level style
   o write truth table
   o use k-maps, come up with Boolean expression
   o then implement Boolean expression

o write truth table

i1 i0 sel y

0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1

y = i0~sel or i1sel

4. we develop a testbench,
   • apply inputs to the design
   • get the outputs, compare those outputs with expected values
     o if above works, then we can say, mux2x1 is working fine.
5. what is simulation? how to run simulation?
   • simulation is process of applying inputs to the design
   • how to run simulation?
     o compile the verilog code
     o elaborate
     o wave(add signals to the waveform)
     o run the simulation
   • tools available for simulation purpose
     o modelsim, questasim => mentor graphics
     o vcs => synopsys
     o ncsim, excelium => cadence
     o reviera => aldec
     o ISE => Xilinx

6.
use cd to go to the directory, where we need to run the simulation
o compile the verilog code
vlog
o elaborate
vsim
o wave(add signals to the waveform)
add wave
o run the simulation
run -all

7. laptop
   ask you test : a => is laptop working properly?
   o we need to apply multiple inputs
8. how to install modelsim, mux code, tb, simulation flow

SESSION#3

1. scalar and vector
2. scalar
   wire r;
   reg a;
3. vector
   o declar a 9 bit vector, whose MSB is 7
   reg [7:-1] a;
   reg [7:15] a; o declar a 5 bit vector, whose LSB is -2
   reg [-6:-2] b;
   reg [2:-2] b;

4. Why we need vectors?

5. reg [31:0] addr;
   size? 32
   what value to assign? 200
   in what radix format to assign?

• decimal
  addr = 200; //32’d200 same as 200
• hexa
  addr = 32’hC8
• binary
  addr = 32’h1100_1000

5. reg [14:0] data;
   value = 350
   assign value in all 4 formats(decimal, hexa, binary, octal)
6. 1 bit FA
7. metastability
   o setup time and hold time
   o if there is any violation in setup or hold time => FF enters in to unknown state
   o unknown state => output can be 1 or 0 => metastability state o setup time
   o minumum time before the active edge of the clock for which d input must be stable
   analogy: flight boarding time
   o 45 minutes before the boarding time
   o you may catch the flight ==> logic 1
   o you may miss the flight ==> logic 0
   o hold time
   o analogy:
   o once get down flight, we have to wait for 10 minutes to collect luggage
8. vector to vector assignment
   a = b; //example of assignment
   integer a, b;
   b = 20;
   a = b; //a? 20

vector also work in the same manner.

10. busA = busB;
    reg [3:0] busA;
    reg [5:0] busB;
    busA = busB;
    busA[0] = busB[0];
    busA[1] = busB[1];
    busA[2] = busB[2];
    busA[3] = busB[3];
    what happens to busB[4] & [5]? not connected.
11. vec_a = vec_b;
    vec_a[] = vec_b[]?
12. in case vec_a is a compliment, then will the top 2 bits be taken as 1;s?
    o no
    o vector assignment is just position to position copy

13.
reg [-2:2] vec_a;
5 bit vector
reg [-8:-6] vec_b;
3 bit vector
vec_a = vec_b;
vec_a[2] = vec_b[-6];
vec_a[1] = vec_b[-7];
vec_a[0] = vec_b[-8];
vec_a[-1] = 0
vec_a[-2] = 0
o
14.
reg [-2:2] vec_a; 5 bit vector
reg [-8:-4] vec_b; 5 bit vector
vec_a = vec_b;

15. vec_b = 125 = 7’b1111101; //64+32+16+8+4+1 = 15
    vec_a = vec_b;
    vec_a = 125 = 7’b1111101;
    vec_a[2] = 0 vec_a[0:3] = 4’b1101
    //vec_a[3:0] access will be wrong
    vec_a [-3:-1] = 3’b111
    vec_a [-2:3] = 6’b111101;
16. reg [6:0] vec_a;
    vec_a[3:0] ? correct
    vec_a[0:3] ? wrong

17.
69 to binary
64+4+1
reg [10:3] vec_a;
vec_a = 8’b0100_0101
vec_a[7] = 0
vec_a[10:8] = 3’b010
vec_a[5:3] = 3’b101
//vec_a[3:5] is wrong

18. vec_b = -69
    reg [11:3] vec_a;
    69 => 9’b00100_0101
    -69 => 9’b11011_1010 + 1 (2’s complement)
    = 9’b11011_1011
    vec_a = 9’b11011_1011
    vec_a[7] = 1
    vec_a[10:8] = 3’b101
    vec_a[5:3] = 3’b011

19.
reg [3:0] a, b, c;
a=9, b=7, c?

20Q. can we multiply two binary numbers?
o yes

21Q. can we divide two binary numbers?
o yes

22. how can we measure time using clock?
    clock time period = 10ns
    50ns/timeperiod(10ns) = 5 (number of edges)
    o every electronic device uses same concept of measuring time.
23. 100Mhz
    To measure 10sec?
    o Not ns
    o TP=100Mhz = 1/100Mhz = 1/100*106Hz = 10-8sec = 10ns

Clock freq = 1 Hz => TP = 1/Freq = 1/1 = 1sec
Clock freq = 10 Hz => TP = 1/10 = 0.1 sec
0.1 sec convert to ns => 10**8 ns
1 meter => 1000 mm

Freq = 100Mhz = 108 Hz TP = 1/Freq = 1/(108) sec = 10-8 sec sec to ns convertion => multiply with 109
TP in ns = 10-8 * 109 ns = 10ns

24.
Traffic light controller working at 10KHz
red time = 10 sec
o how many edges to count to be in red time?
o bring it to Hz => divide => sec => convert to req format
yellow time = 20 sec
green time = 50 sec

red :
– 10Khz => TP = 10-4 sec 10Khz = 10*(103) Hz = 104 Hz TP = 1/(104) sec = 10-4 sec – to measure 10 sec 10 sec/TP = 10 sec/10-4 sec = 105 edges yellow edges to count? o 2 * 105
green edges to count?
o 5 * 10**5

25.
Traffic light controller working at 1KHz
red time = 10 sec
o how many edges to count to be in red time?
o bring it to Hz => divide => sec => convert to req format
yellow time = 20 sec
green time = 50 sec

red :
– 1Khz =>
1Khz = (103) Hz = 103 Hz
TP = 1/(103) sec = 10-2 sec
– to measure 10 sec
10 sec/TP = 10 sec/10-2 sec = 104 edges
yellow edges to count?
o 2 * 104 green edges to count? o 5 * 104

26. on what basis do we decide the clk freq?
    o if we want better performance, we go for high frequency clock. high frequency clock results in high power consumption.
    o if we want to reduce power consumption, we go for low frequency clock.
27. TP=10us
    frequency in terms of Mhz?
    TP=10us = 10(10-6) sec = 10-5 sec Freq = 1/ (10-5) Hz = 105 Hz Hz => Mhz (divide with 106) Freq = 105/(10*6) MHz = 0.1 Mhz
28. TP=1ms
    frequency in terms of GHz? (G means 109) TP=1ms => TP = 10-3 sec
    Freq = 1/(10-3) Hz = 103 Hz
    to convert to GHz => divide with 109 Freq = 103/(109) GHz = 10-6 GHz
29. TP=1sec
    frequency in terms of Khz