[vc_row][vc_column][vc_row_inner][vc_column_inner][vc_column_text]Questions: 60
Duration: 3 hours
Submit : 13/July/2018
pd questions
15.How will you decide the die size?
27.One of the naïve approaches to handle the clock skew problem is:
28.Why do we use buffers in a clock tree?
29.The propagation delay of a long interconnection line can be reduced by:
31.It is sometimes necessary to deliberately add clock skew so that:
The total delay of the combinational sections between sequential storage elements are made equal.
The clock frequency can be increased without moving gates across storage elements.
The power consumption is reduced.
None of the above.
32. Suppose that a long interconnection line is split into four shorter segments by inserting repeaters. Which of the following statement is true?
a. The total delay increases by an amount equal to the delay of three repeaters.
b. The RC delay reduces sqrt(4) = 2 times.
c. The RC delay reduces by 4 times. d. None of the above.
33. what are the delay models. Explain.
34. when clocks nets are routed at which stage ?
35. why delay decreses when upsizing is done?
36. what is latency? Explain the types of latency?
37. Does crosstalk always causes setup and violation?
38. What is EM how to reduce EM ?
39. What is virtual and real clock ? why virtual clock is used?
Tool Questions
Digital Questions
46.The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________
47.The given hex number (1E.53)16 is equivalent to
a) (35.68)8
b) (35.24)8
c) (34.34)8
d) (35.59)8
48.How many NOT gates are required for the construction of a 4-to-1 multiplexer?
a) 3
b) 4
c) 2
d) 5
50.In a combinational circuit, the output at any time depends only on the _______ at that time.
51.Ring shift and Johnson counters are:
52.The addition of +19 and +43 results as _________ in 2’s complement system.
CMOS/VLSI test
53.Difference between short channel mosfet and long channel mosfet.
still work like a inverter…if not then what will be its properties?
55.Why we prefer enhancement mosfet over depletion mosfet?
56.Explain CMOS inverter input output characteristics.
57.If both the transistors are in saturation, then they act as
58.CMOS inverter has ______ output impedance
59.Mobility depends on
a) transverse electric field
b) Vg
c) Vdd
d) Channel length
60. Why do we prefer NAND over NOR for digital designs?
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